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IEC 63011-2:2018

Integrated circuits - Three dimensional integrated circuits - Part 2: Alignment of stacked dies having fine pitch interconnect

General information
Valid from 28.11.2018
ICS Groups
31.200 Integrated circuits. Microelectronics
Directives or regulations
None

Standard history

Status
Date
Type
Name
28.11.2018
Main
IEC 63011-2:2018
IEC 63011-2:2018 provides specifications of initial alignment and alignment maintenance between multiple stacked integrated circuits during the die bonding process. These specifications define the alignment keys and operating procedures of the keys. These specifications apply only if electrical coupling method of die-to-die alignment is used in the die stacking.
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PDF
104.90 € incl tax
Paper
104.90 € incl tax
Standard monitoring
English

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Standards designation

EVS Estonian standard
EN European standard (published by an CEN or CENELEC)
EN ISO International standard adopted as an European standard
ISO International Organization for Standardization’s standard
IEC International Electrotechnical Commission’s standard
HD CENELEC’s harmonisation document
   
EVS-EN European standard implemented in Estonia
EVS-EN ISO International standard adopted in Europe and implemented in Estonia
EVS-EN ISO/IEC International standard/International electrotechnical standard adopted in Europe and implemented in Estonia
EVS-IEC International electrotechnical standard implemented in Estonia
EVS-ISO International standard implemented in Estonia
   
A, AMD amedment
+A a full standard plus the amendment
/A only amendment
COR, AC corrigendum
+COR a full standard plus the corrigendum
NA national annex
+NA a full standard plus the national annex
/NA only national annex
TS technical specification
TR technical report
CWA agreement, developed by a CEN or CENELEC
prEVS-EN (etc) draft standard
   
et the standard is in Estonian only
en the standard is in English only
et-en the standard is in Parallel text Estonian-English

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