EVS-EN IEC 60191-1:2018

IEC 60191-1:2018(E) gives guidelines on the preparation of outline drawings of discrete devices, including discrete surface-mounted semiconductor devices with lead count less than 8.
This edition includes the following significant technical changes with respect to the previous edition:
a) the Scope has been extended to include surface-mounted semiconductor devices with a lead count less than 8;
b) a definition of the term "stand-off" has been added;
c) the methods for locating the datum have been extended to be suitable for SMD-packages;
d) the visual identification of terminal position one for automatic handling has been clarified;
e) the rules for the drawing of terminals have been clarified;
f) Table A.1 has been completed with symbols specifically for SMD-packages;
g) Annex B "Standardization philosophy" has been deleted;
h) a normative Annex with special rules for SMD-packages has been added;
i) the examples of semiconductor device drawings have been aligned to state-of-the-art packages including SMD-packages.