Back

EVS-EN IEC 63373:2022

Dynamic on-resistance test method guidelines for GaN HEMT based power conversion devices

General information
Valid from 01.04.2022
Base Documents
IEC 63373:2022; EN IEC 63373:2022
Directives or regulations
None
Standard history
Status
Date
Type
Name
01.04.2022
Main
In general, dynamic ON-resistance testing is a measure of charge trapping phenomena in GaN power transistors. This publication describes the guidelines for testing dynamic ON-resistance of GaN lateral power transistor solutions. The test methods can be applied to the following: a) GaN enhancement and depletion-mode discrete power devices [1] b) GaN integrated power solutions c) the above in wafer and package levels Wafer level tests are recommended to minimize parasitic effects when performing high precision measurements. For package level tests, the impact of package thermal characteristics should be considered so as to minimize any device under test (DUT) self-heating implications. The prescribed test methods may be used for device characterization, production testing, reliability evaluations and application assessments of GaN power conversion devices. This document is not intended to cover the underlying mechanisms of dynamic ON-resistance and its symbolic representation for product specifications.
*
*
*
PDF
11.39 € incl tax
Paper
11.39 € incl tax
Browse a standard: 2.40 € incl tax
Standard monitoring