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IEC 61189-5:2006

Test methods for electrical materials, interconnection structures and assemblies - Part 5: Test methods for printed board assemblies

General information

Withdrawn from 07.02.2021
ICS Groups
31.180 Printed circuits and boards
Directives or regulations
None

Standard history

Status
Date
Type
Name
03.02.2021
Main
IEC 61189-5-502:2021
29.08.2006
Main
IEC 61189-5:2006
IEC 61189-5:2006 is a catalogue of test methods representing methodologies and procedures that can be applied to test printed board assemblies.

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PDF
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Paper
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Standard monitoring
English (PDF 277 KB)

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Standards designation

EVS Estonian standard
EN European standard (published by an CEN or CENELEC)
EN ISO International standard adopted as an European standard
ISO International Organization for Standardization’s standard
IEC International Electrotechnical Commission’s standard
HD CENELEC’s harmonisation document
   
EVS-EN European standard implemented in Estonia
EVS-EN ISO International standard adopted in Europe and implemented in Estonia
EVS-EN ISO/IEC International standard/International electrotechnical standard adopted in Europe and implemented in Estonia
EVS-IEC International electrotechnical standard implemented in Estonia
EVS-ISO International standard implemented in Estonia
   
A, AMD amedment
+A a full standard plus the amendment
/A only amendment
COR, AC corrigendum
+COR a full standard plus the corrigendum
NA national annex
+NA a full standard plus the national annex
/NA only national annex
TS technical specification
TR technical report
CWA agreement, developed by a CEN or CENELEC
prEVS-EN (etc) draft standard
   
et the standard is in Estonian only
en the standard is in English only
et-en the standard is in Parallel text Estonian-English