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IEC TR 61189-5-506:2019

Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-506: General test methods for materials and assemblies - An intercomparison evaluation to implement the use of fine-pitch test structures for surface insulation resistance (SIR) testing of solder fluxes in accordance with IEC 61189-5-501

General information
Valid from 26.06.2019
Directives or regulations
None
Standard history
Status
Date
Type
Name
26.06.2019
Main
IEC TR 61189-5-506:2019(E) is an intercomparison supporting the development of IEC 61189-5-501 in relation to the SIR method. This document sets out to validate the introduction of a new 200-µm gap SIR pattern, and was benched marked against existing SIR gap patterns of 318 µm and 500 µm.
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